Digital Electronics - Dec 2012

Electronics & Telecomm. (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1 (a) Perform the following operations :
(i) 1010.1 × 101.1
(ii) (AA)_H × (55)_H
(iii) Convert (77)₈ into Decimal number system
(iv) Find (22.31)₁₀ using 2's complement number system
(v) Convert (1110101100000111)₂ into Hexa-decimal number system(10 marks) 1 (b) Draw state diagram of sequence detector to detect a non-overlapping sequence 10001. write its state table. Find the equivalent state if they are present (10 marks) 2 (a) Design lockout free Mod 13 up synchronous counter using JKMS flip flops.(10 marks) 2 (b) Do the following conversion of flip flops :
(i) JKMS to T (ii) D to T (10 marks) 3 (a) Draw CMOS inverter circuit, discuss its operations and draw its transfer characteristics.(10 marks) 3 (b) For the following function implement the SOP and POS circuit
F(A,B,C,D)=?m (2,3,5,7)+?d(6,13,14,15) (10 marks) 4 (a) For the following function find the reduced Boolean equations using Quine McClusky method;
F(A,B,C,D)=?m(1,3,4,6,9,11,12)+?d(5,8,15)(10 marks) 4 (b) Draw JKMS flip flop and explain its operation(10 marks) 5 (a) Design full adder using decoder with active high output(10 marks) 5 (b) Explain following characteristics of logic families;
(i) Propagation delay (ii) Noise margin (iii) Current parameters (iv) Temperature range (v) Fan out (10 marks) 6 (a) Design a PROM which will convert BCD numbers into Gray code(10 marks) 6 (b) Use 5 Input, 3 Product, 4 Output PAL to realize followinng 3 functions.
F1(A,B,C,D)=?m(2,3,4,8,913,14)
F2(A,B,C,D)=?m(2,3,5,8,9,14,15)
F3(A,B,C,D)=?m(2,3,4,8,9,14,15)(10 marks)

Write short notes on any four of the following

7 (a) FPGA(5 marks) 7 (b) Asynchronous counters(5 marks) 7 (c) ECL logig family(5 marks) 7 (d) Weighted and non-weighted codes(5 marks) 7 (e) ROM(5 marks)