Analog & Digital Circuits - May 2012

Information Technology (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1(a) Convert 243₅ to base 8 number and 7 number(4 marks) 1(b) Perform the following operations:
(i) F8F₁₆ + D49₁₆
(ii) 672_BCD + 238_BCD(6 marks) 1(c) Explain conversion of SR flip flop to JK flip-flop. (5 marks) 1(d) With the help of suitable example, explain how hamming code is able to locate and correct single bit error. (5 marks)

Reduce the following function using:

2(a) Implement one digit BCD adder using IC 7483.Explain its working. Expand your design to implement 4 Digit BCD.(10 marks) 2(b) Implement 2bit comparator using Active low decoder.(10 marks) 3(a) Implement 4bit Asynchronous up counter. Also sketch timing diagram.(10 marks) 3(b) Explain bidirectional shift register with suitable diagram?(10 marks) 4(a) Design mod-12 synchronous up counter using JK flip-flop and NAND gates only. Design the counter as lock out free counter.(12 marks) 4(b) VHDL script for 3:8 decoder.(8 marks) 5(a) Draw the circuit diagram of TTL NAND gate and explain its operations.(10 marks) 5(b) Implement full adder using 2 4-bit Multiplier and additional gates.(10 marks) 6(a) Implement Quine McCluskey Minimization technique with an example.(10 marks) 6(b) Implement BCD to Excess 3 code converter using NOR gates only.(10 marks)

Write short notes on any two of the following:-

7(a) CAD Tools(10 marks) 7(b) Race around condition and its remedy in master Slave JK flip flop(10 marks) 7(c) Programmable Logic Device(10 marks) 7(d) Priority Encoder(10 marks)