Analog & Digital Circuits - Dec 2012

Information Technology (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1(a) Explain NAND gate as a Universal logic gate. (4 marks) 1(b) Convert the following binary numbers to Decimal, Hexadecimal and Octal form.
(i) (101101.1101)₂
(ii) (11011011.100101)₂(6 marks) 1(c) Encode the binary word 1011 into seven bit even parity Hamming code(4 marks) 1(d) State and explain D-Morgan's theorem(6 marks)

Reduce the following function using:

2(a)(i) Reduce the following using Karnaugh map technique and implement using basic gates
(6 marks) 2(a)(ii) Minimize the expression using K Map technique.
(4 marks) 2(b) Simplify the Boolean function by using Quine-McCluskey method
F(A,B,C,D) = ?m(0,2,3,6,7,8,10,12,13)(10 marks) 3(a) Implement the following Boolean function using 8:1 multiplexer
(8 marks) 3(b) Design 2-bit comparator using gates.(12 marks) 4(a) Convert:
(i) SR flip flop to D flip flop
(ii) T flip flop to D flip flop(10 marks) 4(b) Explain mster slave JK flip flop in detail. How the race around condition is avoided(10 marks) 5(a) Explain 4 bit bidirectional shift register. What are uses of register ?(10 marks) 5(b) Design Binary to Grey code converter(10 marks) 6(a) Explain parity generator and checker(10 marks) 6(b) Design 3 bit synchronous counter using JK flip flop.(10 marks)

Write short notes on any two of the following:-

7(a) CAD tools(10 marks) 7(b) VHDL features(10 marks) 7(c ) PAL and PLA(10 marks) 7(d) Mealy and Moore machines(10 marks)