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With the help of neat diagram explain the input characteristics of an NPN transistor in the common emitter configuration.

Mumbai University > FE > Sem 1 > Basic Electrical and Electronics Engineering

Marks: 4 M

Year: Dec 2014

1 Answer
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Explanation:

enter image description here

  1. After the Outin voltage $I_B \uparrow$ rapidly with small increase in $V_{BE} = \gt$ The dynamic input resistance $r_1$ is small in CE configuration.

    It is given by $r_1=\dfrac{\Delta V_{BE}}{I_B} V_{CE} = constant$

    Shown in above figure

    The value of $r_1$ is typically 1kΩ but can range from 800Ω to 3KΩ.

  2. For a fixed value of $V_{BI}, I_B \downarrow as V_{CE}$. A lager value of $V_{CE}$ results in a large reverse bias at C-B junction. This $\uparrow$ the depletion region and reduces the effective width of the base. Hence there are fewer recombination in base region and reducing $I_B$

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