Mumbai University > Electronics Engineering > Sem6 > Computer Organization

Marks: 10M

Year: June 2015

1) IA32 instruction set is extensive. It is encoded in available length instruction format that does not have a fully regular layout.

2) Most of the IA-32 instructions have either one or two operands. In two-operand case, only one operand can be in memory. The other must be in a processor register.

3) In addition to the usual instructions for moving data between the memory and the processor registers, and for performing arithmetic operations, the instruction set includes a number of different logical and shift/rotate operation.

4) IA-32 architecture has instructions that perform the logical operation AND, OR and XOR. The operation is performed bitwise on two operands, and the result is placed is in destination location. There is also a NOT instruction which generates the logical complement of all bits of the operand.

5) As there are Add and subtract instructions for signed integer numbers, there are integer multiply and divide, as well as instructions for operations on floating –point numbers.

6) In general, the multiplication of 32-bit integers produces of 64-bits. However, in many applications, it may be known that the product is only a single length 32-bit result.

7) Both single-precision (32-bit) and double precision (64-bit) formats are supported in the instruction set.

8) The arithmetic and logical operation are also performed on quad words operands.

The different floating point arithmetic instruction in IA-32 are as follows:

i) ADDPS

Add packed single precision floating point values.

ii) ADDSS

Add scalar single precision floating point values.

iii) ADDPD

Add packed double precision floating point values.

iv) ADDSD

Add scalar double precision floating point values.

v) SUBPD

Subtract packed double precision floating point values.