8085 supports two types of interrupts. They are

1. Hardware interrupts-

• Peripheral device activates interrupt by activating the respective pin.
• In response to the interrupt request, microprocessor completes the current instruction execution in main program and transfer program control to interrupt service routine.
• In ISR routine, required task is completed. Task may be to read data, to write data, to update the status, to update the counter etc.
• After completing the task, the program control is transferred back to the main program.These types of interrupts where the microprocessor pins are used to receive interrupt requests are called hardware interrupts.
• The microprocessor 8085 has five hardware interrupts. They are TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.

TRAP:

• It is a non-mask-able edge and level triggered interrupt.
• It is unaffected by any mask or interrupt enable.
• The TRAP signal must make a LOW to HIGH transition and remain HIGH until acknowledged. This avoids false triggering due to noise or glitches.
• It has the highest priority among all interrupts.
• This interrupt transfers the microprocessor’s control to location 0024 H.

RST 7.5:

• It is mask-able, edge triggered interrupt request input line. This interrupt is triggered at the rising edge of the signal.
• It has highest priority among all mask-able interrupts and second priority among all interrupts.
• The interrupt vector location for this interrupt is 003C H.

RST 6.5 and RST 5.5:

• These are level triggered, mask-able interrupt request input lines.
• RST 6.5 transfers microprocessor’s control to location 0034 H while RST 5.5 transfers microprocessor’s control to location 002C H.

INTR:

• It is level triggered, mask-able interrupt request input line.
• This interrupt works in conjunction with RST N or CALL instruction.

1. Software interrupts-

• In case of software interrupts the cause of the interrupt is the execution of the instruction.
• The microprocessor 8085 has eight instructions. These eight instructions are RST 0 to RST 7. Such interrupts are called as software interrupts.
• They allow the microprocessor to transfer program control from the main program to the subroutine program i.e. predefined service routine addresses.
• Predefined service routine is also referred to as ISR.
• After completing the subroutine program, the program control returns back to the main program.
• The vector locations for RST N instruction are as follows-

• The difference between two successive locations is only 8 bytes. Hence jump instruction must be stored into corresponding location to transfer microprocessor’s control to user defined ISR address.
• Software interrupts are not used to handle asynchronous events. They are used to call software routines like single step, break point etc.