written 8.4 years ago by
teamques10
★ 68k
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modified 8.4 years ago
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$ \overline{S_2} - M / \overline{IO}$
- In minimum mode, it carries the $M/ \overline{IO}$ signal to distinguish between memory and IO access.
- In maximum mode, it carries the $\overline{S_2}$ signal. $\overline{S_2}$ is a status signal given to 8288.
$ \overline{S_1} - DT/ \bar{R}$
- In minimum mode, it carries the $DT/ \bar{R}$ signal indicating data transmit or receive.
- This signal goes low for a read operation and high for a write operation.
- In maximum mode it carries the $\overline{S_1}$ signal. $\overline{S_1}$ is status signal given to 8288.
- In maximum mode, bus controller issues the $DT/ \bar{R}$ signal to 8286.
$\overline{S_0} - \overline{DEN}$
- In minimum mode it carries the $\overline{DEN}$ signal and is used to enable the data transceivers.
- In maximum mode it carries the $\overline{S_0}$ signal. $\overline{S_0}$ is a status signal given to 8288.
- In maximum mode, bus controller (IC 8288) generates the DEN signal for 8286.
In maximum mode $\overline{S_2} , \overline{S_1}$and $\overline{S_0}$ are used to generate the appropriate control signal.
S2 |
S1 |
S0 |
Machine cycle |
0 |
0 |
0 |
Interrupt acknowledge |
0 |
0 |
1 |
Read I/O port |
0 |
1 |
0 |
Write I/O port |
0 |
1 |
1 |
Halt |
1 |
0 |
0 |
Code access |
1 |
0 |
1 |
Read memory |
1 |
1 |
0 |
Write memory |
1 |
1 |
1 |
Passive |