written 8.4 years ago by | • modified 8.4 years ago |
Mumbai University > Computer Engineering > Sem-5 > Microprocessor
Marks: 5
Year: May 2016
written 8.4 years ago by | • modified 8.4 years ago |
Mumbai University > Computer Engineering > Sem-5 > Microprocessor
Marks: 5
Year: May 2016
written 8.4 years ago by | • modified 8.4 years ago |
8089 is an I/O processor.
It was available for use with the 8086/8088 central processor.
It uses the same programming technique as 8087 for I/O Operations, such as transfer of data from memory to a peripheral device.
Features:
8089 has very high speed DMA capability.
It has 1 MB address capability.
It is compatible with iAPX 86, 88.
It supports local mode and remote mode I/O processing.
8089 allows mixed interface of 8-and 16-bit peripherals, to 8-and 16-bit processor buses.
It supports two I/O channels.
Multibus compatible system interface.
Memory based communications with CPU.
Block Diagram:
I) Common Control Unit (CCU):
8089 I/O Processor has two channels.
The activities of these two channels are controlled by CCU.
CCU determines which channel—1 or 2 will execute the next cycle.
In a particular case where both the channels have equal priority, an interleave procedure is adopted in which each alternate cycle is assigned to channels 1 and 2.
II) Arithmetic & Logic Unit (ALU):
ALU is used to perform the Arithmetic & Logical operations.
It performs Arithmetic Operations like Addition, Subtraction & Logical Operations like AND, OR, EX-OR etc.
ALU looks after the branching decisions.
III) Assembly/Disassembly registers:
This registers permits 8089 to deal with 8-or 16-bit data width devices or a mix of both.
In a particular case of an 8–bit width I/O device inputting data to a 16-bit memory interface, 8089 capture two bytes from the device and then write it into the assigned memory locations with the help of assembly/disassembly register.
IV) Bus Interface Unit (BIU):
Fetch the instruction or data from primary memory.
Read / Write of data from / to primary memory.
I/O of data from / to peripheral ports.
Address generation for memory reference.
V) Instruction Fetch:
It is used to fetches the instructions from the external memory and stores them in the Queue to be executed further.