Mumbai University > EXTC > Sem 3 > Analog Electronics 1

Marks: 4 M, 10 M

Year: Nov 2013, May 2014

• MOS capacitor is an equilibrium device i.e. when the external voltage is not applied to the device the Fermi level of metal and semiconductor are at same level.
• When external voltage is applied to device it behaves according to the voltage applied with respect to flat band voltage and threshold voltage.
• Flat band voltage is defined as a work function difference between the gate metal and the semiconductor when no charge is present in oxide-semiconductor interface.
• Threshold voltage is defined as the minimum gate-to-source voltage required to induce or create a conducting channel. This can be divided into three types

1. Accumulation layer:

• In this case, applied voltage $(V_g)$ is less than flat band voltage. Voltage applied to gate(on metal side) is negative

Fig1 energy band diagram and MOSFET internal charge distribution in accumulation region

Where

$E_C$= conduction band energy level

$E_F$= Fermi energy level

$E_V$ = valance band energy level

$E_i$ = intrinsic energy level

Q = charge of electron

$V_g$=voltage applied on gate

$Φ_s$=surface voltage

• When voltage is applied, mosfet no longer remain in equilibrium condition. The Fermi energy level of metal changes by charge of electron multiplied by applied voltage. Voltage applied is negative and hence rise in Fermi level of metal takes place while Fermi level of semiconductor remain constant
• Voltage applied to the gate is negative hence negative charge develops near metal-oxide junction thus positively charged hole travel towards the oxide junction thus creating positive charge near the oxide-semiconductor junction.
• Due to accumulation of positive charge, surface voltage is developed near oxide-semiconductor junction due to this energy band bending takes place and the value is charge of electron multiplied by surface voltage.
• Energy band bending is changes in energy offset (level) of semiconductor’s band structure near junction due to space charge.

2. Depletion layer:

• In depletion region, voltage applied to gate is greater than flat band voltage and less than threshold voltage.

Fig2 energy band diagram and MOSFET internal charge distribution in depletion region

• In this case, voltage applied to gate is positive hence there is fall in Fermi energy level of metal while rise in Fermi energy level of semiconductor.
• Since voltage applied to positive and hence positive charge develops near metal-oxide junction thus the electrons travel towards the gate creating negative charge near oxide-semiconductor junction.
• Electrons recombine with holes present near oxide creating depletion region.
• Surface voltage develops in depletion region and effect of this we have energy band bending in depletion region.

3. Inversion layer:

• In inversion layer, applied voltage is greater than threshold voltage.
• The reason it is called as inversion layer as the surface is inverted from p-type to n-type near the junction.
• Voltage applied is very high hence Fermi level of metal goes down further
• Since voltage applied is positive to gate, electrons travel towards the gate and accumulates near semiconductor-oxide junction resulting development of surface potential. Due to surface potential energy band bending takes place.
• From the diagram p type substrate near semiconductor-oxide junction has intrinsic energy level below Fermi energy level and this part of substrate behave as n-type semiconductor and part above the Fermi level behave as p-type semiconductor. This happen due to concentration of electrons exceeds concentration of holes near semiconductor-oxide junction and the event is called as surface inversion.
• N-type semiconductor acts as a channel for current and current can flow through this channel on application of positive drain-source voltage.

Fig3 energy band diagram and MOSFET internal charge distribution in inversion region