Figure 1 shows the block diagram of phase locked loop. It consists of
Figure b shows the block diagram of IC 565
Phase detector
Low pass filter
Voltage controlled oscillator
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• Phase Detector :
1) The phase detector compares the input frequency fIN with the feedback frequency fOUT.
2) The output of phase detector is proportional to the phase difference between fIN and fOUT. If the two signal which are applied as input to PLL differs in frequency or phase , an error voltage Ve is generated.
3) The phase detector is basically a multiplier and produces the sum (fIN+fOUT) and difference (fIN−fOUT) components at its output.
4) The output of phase detector is then applied to the low pass filter, which removes the high- frequency noise and produces a dc level.
• Low Pass Filter :
1) The function of low pass filter is to remove the high frequency components in the output of the phase detector and to remove high frequency noise.
2) The low pass filter controls dynamic characteristics such as capture and lock ranges, bandwidth and transient response.
3) Lock range is defined as the range of frequencies over which the PLL system follows the changes in the input frequency fIN, Lock range is also called as tracking range.
4) Capture range is the frequency range in which the PLL acquires phase lock. Capture range is always smaller than Lock range.
5) The filter bandwidth is reduced, its response time increases. However, reduced bandwidth reduces the capture range of the PLL. Reduced bandwidth helps to keep the loop in lock through momentary losses of signal and also minimizes noise.
• Voltage Controlled Oscillator :
1) Third section of the PLL is the voltage controlled oscillator. The VCO generates an output frequency that is directly proportional of its input voltage.
2) The VCO frequency is compared with the input frequencies and adjusted until it is equal to the input frequencies.
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