Mumbai University > Electronics Engineering > Sem4 > Fundamentals of Communication Engineering

Marks: 5M

Year: May2014

• In the Foster-Seeley discriminator, the amplitude of the resulting output voltage varies as per varying magnitude of the input signal. This discriminator circuit is modified is to provide amplitude limiting of the incoming signal and is termed as Ratio detector.
• The Ratio detector circuit is given below in Fig1.

• The Ratio detector circuit is almost same as Foster-Seeley discriminator, except for the below modifications:

1. Diode $D_2$ is reversed in direction.
2. A large capacitor $C_9$ is connected across the output voltage of the two diodes.
3. The output voltage of the detector is taken across P and Q.

• The primary and secondary circuits are tuned to carrier frequency and $C_3$ is the coupling capacitor while $L_3$ is the RFC element.

• The two generated frequency dependent output voltages are applied to the two diodes $D_1$ and $D_2$. The capacitor $C_9$ has large value, typically 10 μF which charges to the peak value of voltage across $L_2$ and due to the large time constant, it holds this voltage.

• The effect of any amplitude variations due to noise and other interference is minimal on the charge of capacitor $C_9$ and the voltage remains constant.

• Additional limiter circuit is not required since the output voltage is not affected by amplitude variations in the incoming signals.

• Conversely, when $D_1$ conducts more than $D_2, V_01$ exceeds $V_{02}$ again resulting in the sum of these voltages as constant. Thus the output voltage V_out is negative.

• Therefore in this circuit the sum of the voltages $V_{01}$ and $V_{02}$ always remains constant, but their ratio changes depending on the signal frequency. Hence the circuit is called ratio detector.